component top 
  word_length : generic integer = 8
  T_in        : generic type = bitvector(2*word_length)
  T_out       : generic type = bitvector(word_length+1)
  data_in     : in T_in
  data_out    : out T_out

type
  T_num   : signed(word_length)
  T_num_p1: signed(word_length+1)

register
  storage: T_out = 0

variable
  left, right: T_num
  sum: T_num_p1

begin
  left  = reinterpret(T_num, data_in[0:word_length-1])
  right = reinterpret(T_num, data_in[word_length:2*word_length-1])
  sum = left + right
  storage = reinterpret(T_out, sum)
  data_out = storage
end