https://www.bibix.nl/dokuwiki/ 2026-05-02T07:41:43+00:00 https://www.bibix.nl/dokuwiki/ https://www.bibix.nl/dokuwiki/lib/tpl/bibix02/images/favicon.ico text/html 2023-07-24T21:05:13+00:00 Anonymous (anonymous@undisclosed.example.com) https://www.bibix.nl/dokuwiki/doku.php?id=arx:component&rev=1690225513&do=diff The Component In Arx, the component is the basic building block of hardware, comparable to a module in Verilog or the entity-architecture combination in VHDL. Example 1: Register The code below shows one of the simplest components that one could describe in Arx (say, the text/html 2023-07-17T22:40:53+00:00 Anonymous (anonymous@undisclosed.example.com) https://www.bibix.nl/dokuwiki/doku.php?id=arx:cpp_sim&rev=1689626453&do=diff Simulation Guide for C++ Generated Code Suppose that you generate C++ code from Arx source file foo.arx. The result is a C++ class called foo the description of which is distributed across the files foo.h and foo.cpp. Hierarchy that may have been present in the original Arx description is not preserved. The execution model that has been chosen for simulation requires the design to be flattened. text/html 2023-07-17T22:40:53+00:00 Anonymous (anonymous@undisclosed.example.com) https://www.bibix.nl/dokuwiki/doku.php?id=arx:datatypes&rev=1689626453&do=diff Arx Data Types Scalar Data Types The basic data types of Arx can be subdivided in scalar and vector data types. The scalar types are given in the table below: Data type Explanation bit The data type for binary signals. Possible values are 0 and text/html 2023-07-17T22:40:53+00:00 Anonymous (anonymous@undisclosed.example.com) https://www.bibix.nl/dokuwiki/doku.php?id=arx:declarations&rev=1689626453&do=diff Declarations This section discusses all possible declarations that are allowed in an Arx component descripition. Declarations can be made in the first part of a component description, before the occerrence of keyword begin. There are two categories of declarations in Arx: text/html 2023-07-17T22:40:53+00:00 Anonymous (anonymous@undisclosed.example.com) https://www.bibix.nl/dokuwiki/doku.php?id=arx:expressions&rev=1689626453&do=diff Expressions and Operators Arx does not differ much from other mainstream languages in the way it deals with expressions and operators. Parentheses ( and ) can be used to override default precedence when grouping operands (“multiplication binds stronger than addition text/html 2023-07-17T22:40:53+00:00 Anonymous (anonymous@undisclosed.example.com) https://www.bibix.nl/dokuwiki/doku.php?id=arx:function&rev=1689626453&do=diff Functions Functions allow a set of calculations to be isolated and grouped under a user-defined name. This helps to create structured and better readable code. They can only be used to specify the combinational part of RTL descriptions. Functions in Arx are still under development. More features are likely to be added in the future. text/html 2023-07-17T22:40:53+00:00 Anonymous (anonymous@undisclosed.example.com) https://www.bibix.nl/dokuwiki/doku.php?id=arx:instantiation&rev=1689626453&do=diff Instantiation The use of a component inside another component is called instantiation. The component that is instantiated, is the instance. A complex design becomes manageable by subdividing it into smaller subcomponents. Recursively subdividing these subcomponents results in a text/html 2023-07-17T22:40:53+00:00 Anonymous (anonymous@undisclosed.example.com) https://www.bibix.nl/dokuwiki/doku.php?id=arx:main&rev=1689626453&do=diff Arx Manual Arx is a domain-specific hardware-description language intended for hardware design at the register-transfer level (RTL). Arx is also a toolset which currently consists of two code generators: * A C code generator on behalf of efficient, zero-delay simulation. text/html 2023-07-17T22:40:53+00:00 Anonymous (anonymous@undisclosed.example.com) https://www.bibix.nl/dokuwiki/doku.php?id=arx:rtl&rev=1689626453&do=diff Register-Transfer Level (RTL) At the register-transfer level, the timing of a design is specified at the resolution of clock cycles: one knows what has to happen from the moment that a register output value changes until new values become available to update the registers in the next clock cycle. If one sees a design as a state machine in which the registers hold the system state, hardware at the RT level obeys the model of the figure below. The figure depicts a so-called Mealy-type finite stat… text/html 2023-07-17T22:40:53+00:00 Anonymous (anonymous@undisclosed.example.com) https://www.bibix.nl/dokuwiki/doku.php?id=arx:simulation&rev=1689626453&do=diff Arx Simulation Guide The current version of Arx supports two target languages for which code can be generated: C++ and VHDL. Guidelines for simulations are given in two different pages: * Simulation Guide for C++ * Simulation Guide for VHDL text/html 2023-07-17T22:40:53+00:00 Anonymous (anonymous@undisclosed.example.com) https://www.bibix.nl/dokuwiki/doku.php?id=arx:statements&rev=1689626453&do=diff Statements Statements are the Arx language elements that are found in a component description or a function declaration between the keywords begin and end. In this section, the different type of statements are presented. Assignment The assignment statement is used to specify a new value for a signal, where a signal is either a register or variable (see the page on text/html 2023-07-17T22:40:53+00:00 Anonymous (anonymous@undisclosed.example.com) https://www.bibix.nl/dokuwiki/doku.php?id=arx:syntax&rev=1689626453&do=diff The Arx Syntax and Semantics General The Arx language has a mainstream syntax comparable to the syntax of languages as C, Pascal, Matlab, or VHDL. The most deviant syntax feature is maybe that no semicolons are used at the end of statements. Case Sensitivity Arx is case sensitive. All keywords should be written in lower case. Identifiers can have upper and lower case characters. It is, however, not recommended to rely on case for distinguishing identifiers. VHDL, for example, is not case s… text/html 2023-07-17T22:40:53+00:00 Anonymous (anonymous@undisclosed.example.com) https://www.bibix.nl/dokuwiki/doku.php?id=arx:vhdl_sim&rev=1689626453&do=diff Simulation Guide for VHDL Simulating the VHDL generated from Arx is straightforward. As opposed to the generated C++, the hierarchy of the Arx source code is preserved in the VHDL. For source code in the file foo.arx, the VHDL file foo.vhd is generated. Top model